JG82875 S L8DB Intel, JG82875 S L8DB Datasheet - Page 134

• Manufacturer Part Number: JG82875 S L8DB
• Manufacturer: Intel

Specifications of JG82875 S L8DB

• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

Functional Description
5.2.6.3
5.2.7
5.2.7.1
134
Table 23. Data Bytes on DIMM Used for Programming DRAM Registers
Memory Register Programming
Determining When to Thermal Manage
This section provides an overview of how the required information for programming the DRAM
registers is obtained from the Serial Presence Detect ports on the DIMMs. The Serial Presence
Detect ports are used to determine Refresh Rate, SMA and SMD Buffer Strength, Row Type (on a
row-by-row basis), DRAM Timings, Row sizes, and Row Page sizes.
data available through the on board Serial Presence Detect ROM on each DIMM.
Table 23
enough data for programming the MCH DRAM registers.
Memory Thermal Management
The MCH provides a thermal management method that selectively reduces reads and writes to
DRAM when the access rate crosses the allowed thermal threshold.
Read and write thermal management operate independently, and have their own 64-bit register to
control operation. Memory reads typically causes power dissipation in the DRAM chips while
memory writes typically causes power dissipation in the MCH.
Thermal management may be enabled by one of two mechanisms:
•
•
Byte
Software forcing throttling via the SRT (SWT) bit.
Counter Mechanism.
12
17
11
2
3
4
5
is only a subset of the defined SPD bytes on the DIMMs. These bytes collectively provide
Memory type (DDR DRAM)
Number of row addresses, not counting bank addresses
Number of column addresses
Number of banks of DRAM (single- or double-sided DIMM)
ECC, non-ECC
Refresh rate
Number of banks on each device
Function
Intel
Table 23
®
82875P MCH Datasheet
lists a subset of the