JG82875 S L8DB Intel, JG82875 S L8DB Datasheet - Page 142

• Manufacturer Part Number: JG82875 S L8DB
• Manufacturer: Intel

Specifications of JG82875 S L8DB

• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

Functional Description
5.6
142
Figure 14. Intel
Clocking
The MCH has the following clocks:
The MCH has inputs for a low voltage, differential pair of clocks called HCLKP and HCLKN.
These pins receive a host clock from the external clock synthesizer. This clock is used by the host
interface and system memory logic (Host Clock Domain). AGP and hub interface are synchronous
to each other and are driven off of the 66-MHz clock.
•
•
•
•
100/133/200 MHz spread spectrum, low voltage (0.7 V) differential HCLKP/HCLKN for FSB
66.667 MHz, spread spectrum, 3.3 V GCLKIN for hub interface and AGP
48 MHz, non-spread spectrum, USB clock
12 pairs DRAM output clocks (SCMCLK_x[5:0] and SCMDCLK_x[5:0]# for both channels
A and B)
®
CK- 409
Main PLL
ITP
400 MHz
875P Chipset System Clock Block Diagram
133/200
Low Voltage Differential Clocks
100/
MHz
Low Voltage Differential Clocks
14 MHz
OSC
66 MHz
48 MHz
PLL
66 MHz
/2
MCH
Section
48 MHz USB
Buffer
Core
PLL
Host
PLL
14 MHz
Processor
33 MHz APIC
AND/OR
33 MHz
33 MHz
33 MHz
33 MHz
33 MHz
33 MHz
33 MHz
33 MHz
33 MHz
66 MHz
Differential Pairs
Differential Pairs
DDR
DDR
PCI Slot 0
PCI Slot 1
PCI Slot 2
PCI Dev 1
PCI Dev 2
PCI Dev 3
PCI Dev 4
PCI Dev 5
Intel
ICH5
®
Intel
®
82875P MCH Datasheet
266/333/400 MHz DDR