JG82875 S L8DB Intel, JG82875 S L8DB Datasheet - Page 78

• Manufacturer Part Number: JG82875 S L8DB
• Manufacturer: Intel

Specifications of JG82875 S L8DB

• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

Register Description
3.6
78
Table 8.
PCI-to-AGP Bridge Registers (Device 1)
Device 1 is the virtual PCI-to-AGP bridge.
descriptions in this section are arranged by ascending offset address.
PCI-to-AGP Bridge Register Address Map (Device 1)
Address
1E–1Fh
28
41
00–01h
02–03h
04–05h
06–07h
0F
20–21h
22–23h
24–25h
26–27h
Offset
0Ah
0Bh
0Ch
0Dh
0Eh
1Ah
1Bh
1Ch
1Dh
3Eh
08h
09h
18h
19h
3Fh
40h
–
–
–
3Dh
FFh
17h
ERRCMD1
SUBUSN1
PMBASE1
PMLIMIT1
PCICMD1
IOBASE1
PCISTS1
IOLIMIT1
Register
PBUSN1
SBUSN1
MBASE1
MLIMIT1
BCTRL1
Symbol
SUBC1
SMLT1
SSTS1
HDR1
BCC1
MLT1
VID1
DID1
RID1
—
—
—
—
—
—
Vendor Identification
Device Identification
PCI Command
PCI Status
Revision Identification
Reserved
Sub-Class Code
Base Class Code
Reserved
Master Latency Timer
Header Type
Reserved
Primary Bus Number
Secondary Bus Number
Subordinate Bus Number
Secondary Bus Master Latency Timer
I/O Base Address
I/O Limit Address
Secondary Status
Memory Base Address
Memory Limit Address
Prefetchable Memory Base Address
Prefetchable Memory Limit Address
Reserved
Bridge Control
Reserved
Error Command
Reserved
Register Name
Table 8
provides the register address map. The register
Intel
Default Value
®
see register
description
82875P MCH Datasheet
FFF0h
FFF0h
00A0h
02A0h
8086h
2579h
0000h
0000h
0000h
04h
06h
01h
F0h
00h
00h
00h
00h
00h
00h
00h
00h
—
—
—
—
—
—
RO R/WC
RO R/WC
RO R/W
RO R/W
RO R/W
RO R/W
RO R/W
RO R/W
RO R/W
RO R/W
RO R/W
RO R/W
RO R/W
Access
R/W
R/W
RO
RO
RO
RO
RO
RO
RO
—
—
—
—
—
—