JG82875 S L8DB Intel, JG82875 S L8DB Datasheet - Page 150

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JG82875 S L8DB

Manufacturer Part Number
JG82875 S L8DB
Description
Manufacturer
Intel
Datasheet

Specifications of JG82875 S L8DB

Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
Electrical Characteristics
Table 33. DC Characteristics (Continued)
150
2.6 V Miscellaneous Signals (3.3 V tolerant)
Bus Select Signals
Clock Signals
V
V
I
CROSS(abs)
C
Symbol
I
Leak_DDR
CROSS(rel)
OH_DDR
RCOMP
IN_DDR
I
I
LEAK
LEAK
V
C
V
V
C
V
V
V
IH
IH
IH
IL
IN
IL
IL
IN
Signal
Group
(v)
(x)
(x)
(y)
(y)
(y)
(y)
(t)
(t)
(t)
(t)
(l)
(l)
(j)
(j)
NOTES:
1. Absolute max overshoot = 4.5 V
2. Crossing voltage is defined as the instantaneous voltage value when the rising edge of HCLKP equals the
3. The crossing point must meet the absolute and relative crossing point specifications simultaneously.
4. V
5. V
6. Maximum leakage current specification for the GVREF pin is 65 µA. Maximum leakage current specification
7. Maximum leakage current specification for HI_VREF and HI_SWING pins is 50 µA. Refer to the Intel
8. Maximum leakage current specification for CI_VREF and CI_SWING pins is 50 µA. Refer to the Intel
falling edge of HCLKN.
oscilloscopes.
for the GVSWING pin is 50 µA. Refer to the Intel
divider circuit details that takes this specification into account.
Chipset Platform Design Guide for the resistor divider circuit details that take this specification into account.
Chipset Platform Design Guide for the resistor divider circuit details that takes this specification into account.
Havg
Havg
DDR RCOMP Output
High Current
Input Leakage
Current
DDR Input /Output
Pin Capacitance
2.6 V Input Low
Voltage
2.6 V Input High
Voltage
2.6 V Input Leakage
Current
2.6 V Input
Capacitance
Input Low Voltage
Input High Voltage
Input Low Voltage
Input High Voltage
Input Leakage
Current
Input Capacitance
Absolute Crossing
Voltage
Relative Crossing
Voltage
is the statistical average of the V
can be measured directly using “Vtop” on Agilent* oscilloscopes and “High” on Tektronix*
Parameter
0.5(V
VCC_DDR – 0.4
VCC_DDR – 0.4
Havg
0.250 +
0.250
Min
–50
0.8
– 0.700)
H
measured by the oscilloscope.
®
875P Chipset Platform Design Guide for the resistor
Nom
NA
NA
0.5(V
VCC_33
VCC_33
Havg
0.550 +
0.550
Max
±15
±50
100
5.5
0.4
5.5
0.4
0.4
5.5
Intel
– 0.700)
®
82875P MCH Datasheet
Unit
mA
µA
µA
µA
pF
pF
pF
V
V
V
V
V
V
V
V
F
1
2,3
3,4,5
C
=1 MHz
Notes
®
®
875P
875P

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