JG82875 S L8DB Intel, JG82875 S L8DB Datasheet - Page 72

• Manufacturer Part Number: JG82875 S L8DB
• Manufacturer: Intel

Specifications of JG82875 S L8DB

• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

Register Description
72
Bit
1:0
3
2
AGP Mode (AGP)—RO. This bit reflects the GPAR strap value. Note that the strap value is
sampled on the assertion of PWROK.
0 = Reserved
1 = AGP
FSB IOQ Depth (IOQD)—RO. This bit is RO and reflects the HA7# strap value. It indicates the
depth of the FSB IOQ. When the strap is sampled low, this bit will be a 0 and the FSB IOQ depth
is set to 1. When the strap is sampled high, this bit will be a 1 and the FSB IOQ depth is set to the
maximum (12 on the bus, 12 on the MCH).
0 = 1 deep
1 = 12 on the bus, 12 on the MCH
FSB Frequency Select (FSBFREQ)—RO. The default value of this bit is set by the strap
assigned to the BSEL[1:0] pins and is latched at the rising edge of PWROK.
00 = Core Frequency is 100 MHz and the FSB frequency is 400 MHz
01 = Core Frequency is 133 MHz and the FSB frequency is 533 MHz
10 = Core Frequency is 200 MHz and the FSB frequency is 800 MHz
11 = Reserved
Descriptions
Intel
®
82875P MCH Datasheet