JG82875 S L8DB Intel, JG82875 S L8DB Datasheet - Page 77

• Manufacturer Part Number: JG82875 S L8DB
• Manufacturer: Intel

Specifications of JG82875 S L8DB

• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

3.5.39
3.5.40
Intel
®
82875P MCH Datasheet
SKPD—Scratchpad Data Register (Device 0)
Address Offset:
Default Value:
Access:
Size:
CAPREG—Capability Identification Register (Device 0)
Address Offset:
Default:
Access:
Size
The Capability Identification Register uniquely identifies chipset capabilities as defined in the
following table.
47:28
27:24
23:16
15:8
15:0
Bit
7:0
Bit
Reserved
CAPREG Version—RO. This field has the value 0001b to identify the first revision of the CAPREG
definition.
Cap_length—RO. This field has the value 06h indicating the structure length.
Next_Pointer—RO. This field has the value A0h pointing to the next capabilities register, AGP
Capability Identifier register (ACAPID). If AGP is disabled, this field has the value 00h signifying the
end of the capabilities linked list.
CAP_ID—RO. This field has the value 09h to identify the CAP_ID assigned by the PCI SIG for
Vendor Dependent CAP_PTR.
Scratchpad (SCRTCH)—R/W. These bits are R/W storage bits that have no effect on the MCH
functionality.
DE–DFh
0000h
R/W
16 bits
E4h–E9h
00000106A009h
RO
40 bits
Descriptions
Descriptions
Register Description
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