ibm3206k0424 ETC-unknow, ibm3206k0424 Datasheet - Page 109

• Manufacturer Part Number: ibm3206k0424
• Description: Ibm Processor For Network Resources
• Manufacturer: ETC-unknow

Preliminary
1.12: PCINT Config Word 15
This register is used to communicate interrupt line routing information, tell which interrupt pin this device
uses, and specify the desired setting for Latency Timer values. See bit definitions.
Length
Type
Address
Restrictions
Power on Reset value
(Big Endian)
Power on Reset value
(Little Endian)
pnr25.chapt04.01
August 14, 2000
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
31-24
23-16
Bit(s)
15-8
Max_Lat (Read Only)
7-0
PCI Spec
7-0
7-0
7-0
7-0
Max_Lat (Read Only).
Min_Gnt (Read Only).
Interrupt Pin (Read Only).
Interrupt Line.
32 bits
Read/Write
XXXX 003C
Can be written or read during configuration cycle, memory cycle when enabled (see
PCINT Base Address Control Register on page 111), or an I/O cycle. This register
is documented as Big Endian, but how data is presented on the PCI bus depends
on how the controls are set in the PCINT Endian Control Register.
X’00010100’
X’00010100’
Min_Gnt (Read Only)
Name
This value specifies a period of time in units of 1/4 microsecond. Max_Lat
is used for specifying how often this device needs to gain access to the
PCI bus.
This value specifies a period of time in units of 1/4 microsecond. Min_Gnt
is used for specifying how long a burst period this device needs, assuming
a 33MHz clock rate.
This device used INTA for its PCI bus interrupt. Value of this field is ‘01’.
Software will write the routing information into this register as it initializes
and configures the system.
Interrupt Pin (Read Only)
The IOP Bus Specific Interface Controller (PCINT)
IBM Processor for Network Resources
Description
9
8
7
6
5
Interrupt Line
4
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IBM3206K0424
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