ibm3206k0424 ETC-unknow, ibm3206k0424 Datasheet - Page 389

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ibm3206k0424

Manufacturer Part Number
ibm3206k0424
Description
Ibm Processor For Network Resources
Manufacturer
ETC-unknow
Datasheet
Preliminary
13.6: RXQUE Threshold Registers
These registers specify a queue length threshold at which the corresponding status bit is generated. These
registers should be set equal to the number of queue entries that should cause status to be generated. For
example, if the value was set to five, then no interrupt would be generated until five or more events were
queued on the corresponding receive queue. The threshold is level sensitive, so as long as the length is
greater than or equal to the threshold, the corresponding status bit is set. When this register is set to ’0’, no
thresholding is done.
When the direction bit is set for a receive queue, the threshold has the opposite polarity. For example, as long
as there are more events in the queue than specified in the threshold register, no status would be raised.
Length
Type
Address
Power on Value
Restrictions
pnr25.chapt05.01
August 14, 2000
17 bits
Read/Write
Queue 0
Queue 1
Queue 2
Queue 3
Queue 4
Queue 5
Queue 6
Queue 7
Queue 8
Queue 9
Queue 10
Queue 11
Queue 12
Queue 13
Queue 14
Queue 15
X’00000’
None
XXXX 181C
XXXX 185C
XXXX 189C
XXXX 18DC
XXXX 191C
XXXX 195C
XXXX 199C
XXXX 19DC
XXXX 1A1C
XXXX 1A5C
XXXX 1A9C
XXXX 1ADC
XXXX 1B1C
XXXX 1B5C
XXXX 1B9C
XXXX 1BDC
IBM Processor for Network Resources
Receive Queues (RXQUE)
Page 389 of 676
IBM3206K0424

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