ibm3206k0424 ETC-unknow, ibm3206k0424 Datasheet - Page 175

• Manufacturer Part Number: ibm3206k0424
• Description: Ibm Processor For Network Resources
• Manufacturer: ETC-unknow

Preliminary
Entity 4: General Purpose DMA (GPDMA)
This entity provides DMA control between System Memory and IBM3206K0424 Packet Memory.
DMA transfers must be enabled in the GPDMA control registers for transmit and/or receive. There are two
ways to initiate DMA transfers. The first is by directly writing the Source Address, Destination Address, and
Transfer Count and Flag Registers. The second is by using DMA descriptors and enqueueing them using
DMAQS. These two methods should not be used simultaneously. If using descriptors, refer to the DMAQS
section beginning on DMA QUEUES (DMAQS) on page 154 for more information.
DMA transfers to system I/O space are not allowed.
4.1: GPDMA Interrupt Status
This register indicates the source(s) of the interrupt(s) pending, or is used as a status register when the bits
are enabled. See Note on Set/Clear Type Registers on page 93 for more details on addressing.
Length
Type
Address
Power on Reset value
Restrictions
pnr25.chapt04.01
August 14, 2000
8
Bit(s)
8
7
5
4
6
7
DMA Transaction Timeout
DMA Command Error
Reserved
Reserved
Zero length DMA request from
DMAQS
6
5
4
Function
3
2
1
9 bits
Read/Write
XXXX 0108 and 0C
X’000’
None
0
The DMA Transaction Timeout specified in the GPDMA Interrupt Enable timed out.
An invalid transfer was described by the value loaded into the Transfer Count and Flag Regis-
ter.
Reserved
Reserved
DMAQS has requested a DMA with a length of zero. This bit is for information use only. This bit
is not an error that will prevent GPDMA from processing additional DMA requests.
Description
IBM Processor for Network Resources
General Purpose DMA (GPDMA)
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IBM3206K0424