ibm3206k0424 ETC-unknow, ibm3206k0424 Datasheet - Page 207

• Manufacturer Part Number: ibm3206k0424
• Description: Ibm Processor For Network Resources
• Manufacturer: ETC-unknow

Preliminary
6.10: VIMEM Access Status Register
This register contains information regarding the current status of the Virtual Memory logic mainly with respect
to detected error access conditions. See Note on Set/Clear Type Registers on page 93 for more details on
addressing.
Length
Type
Address
Power On Value
Restrictions
pnr25.chapt04.01
August 14, 2000
16 15 14 13 12 11 10
Bit(s)
16
15
14
13
12
When set, this bit indicates that the required conditions for the control, packet, and virtual base registers has not been satis-
fied. The required conditions are: control base < packet base < virtual base
When set, this bit indicates that the Virtual Memory logic has detected a page fault error when attempting to read memory.
This indicates that no real buffer was available to map into the virtual address space when required. All virtual reads that fail
during a page fault regardless of the requesting entity will cause this bit to be set. If the corresponding bit is reset in the lock
register, the read operation will complete, but with invalid data.
When set, this bit indicates that a Control Memory access was detected that was above the value contained in the Packet
Memory Offset Register for single bank configurations, or in a multiple bank configuration in which the high address bits 31 -
27 were not ’0’.
When set, this bit indicates that a Packet Memory access of address zero was detected in single bank mode, or that a packet
address was detected that contained an address out of range (high five bits non-zero).
When set, this bit indicates that the Virtual Memory logic has detected a Virtual Memory operation that attempted to access a
map that was not marked as valid. A virtual buffer map is marked valid by the POOLs entity when the buffer is originally
acquired, and is marked as invalid when the buffer is freed back to POOLs. Receiving this error indication typically means
that the software is trying to use a buffer that has not been acquired through the normal means, or is trying to use a buffer
that has already been freed, or that memory has been corrupted. The valid indication that is checked by the hardware is the
value X’?656’ in the first 16 bits of the eight-byte map entry being accessed. To determine the failing address, the memory
control entity can be locked on this type of failure, and the information saved by the memory controller, along with the base
registers in this entity can be used to determine which map was being accessed at the time of failure.
9
17 bits
Read/Write
XXXX 0D60 and 64
X’0000’
None
8
7
6
5
4
3
2
1
Description
0
IBM Processor for Network Resources
ATM Virtual Memory Logic (VIMEM)
Page 207 of 676
IBM3206K0424