tmpr4937 TOSHIBA Semiconductor CORPORATION, tmpr4937 Datasheet - Page 240

• Manufacturer Part Number: tmpr4937
• Description: 64-bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

Bit
7:1
8
0
Mnemonic
ECCE
SEI
—
Single-Bit Error
Interrupt Enable
ECC Enable
Field Name
—
Figure 9.4.4 ECC Control Register (2/2)
Single-Bit Error Interrupt Enable (Default: 0)
Specifies whether to generate an interrupt during a single-bit error.
0: Disable
1: Enable
Reserved
ECC Enable (Default: 0)
Specifies whether to enable the ECC/Parity function. When disabled, the
ECC function will not operate even if the ECC Parity Mode field
(SDCCRn.ECC) selects the ECC/Parity Mode.
0: Disable
1: Enable
9-24
Description
Chapter 9 SDRAM Controller
Read/Write
R/W
R/W
⎯