tmpr4937 TOSHIBA Semiconductor CORPORATION, tmpr4937 Datasheet - Page 459

• Manufacturer Part Number: tmpr4937
• Description: 64-bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

17:16
15:14
13:12
11:10
Bits
9:8
7:6
5:4
3:2
1:0
Mnemonic
IC16
IC7
IC6
IC5
IC4
IC3
IC2
IC1
IC0
Interrupt Source
Control 16
Interrupt Source
Control 7
Interrupt Source
Control 6
Interrupt Source
Control 5
Interrupt Source
Control 4
Interrupt Source
Control 3
Interrupt Source
Control 2
Interrupt Source
Control 1
Interrupt Source
Control 0
Field Name
Figure 15.4.2 Interrupt Detection Mode Register 0 (2/2)
Interrupt Source Control 16 (Default: 00)
These bits specify the active state of PCIC interrupts.
00: Low level active
01: Disable
10: Disable
11: Disable
Interrupt Source Control 7 (Default: 00)
These bits specify the active state of external INT[5] interrupts.
00: Low level active
01: High level active
10: Falling edge active
11: Rising edge active
Interrupt Source Control 6 (Default: 00)
These bits specify the active state of external INT[4] interrupts.
00: Low level active
01: High level active
10: Falling edge active
11: Rising edge active
Interrupt Source Control 5 (Default: 00)
These bits specify the active state of external INT[3] interrupts.
00: Low level active
01: High level active
10: Falling edge active
11: Rising edge active
Interrupt Source Control 4 (Default: 00)
These bits specify the active state of external INT[2] interrupts.
00: Low level active
01: High level active
10: Falling edge active
11: Rising edge active
Interrupt Source Control 3 (Default: 00)
These bits specify the active state of external INT[1] interrupts.
00: Low level active
01: High level active
10: Falling edge active
11: Rising edge active
Interrupt Source Control 2 (Default: 00)
These bits specify the active state of external INT[0] interrupts.
00: Low level active
01: High level active
10: Falling edge active
11: Rising edge active
Interrupt Source Control 1 (Default: 00)
These bits specify the active state of TX49 Write Timeout Error interrupts.
00: Low level active
01: Disable
10: Disable
11: Disable
Interrupt Source Control 0 (Default: 00)
These bits specify the active state of ECC Error interrupts.
00: Low level active
01: Disable
10: Disable
11: Disable
15-13
Explanation
Chapter 15 Interrupt Controller
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W