tmpr4937 TOSHIBA Semiconductor CORPORATION, tmpr4937 Datasheet - Page 92
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tmpr4937
Manufacturer Part Number
tmpr4937
Description
64-bit Tx System Risc
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMPR4937.pdf
(552 pages)
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15:11
Bit
17
16
10
9
8
7
6
5
4
3
2
1
0
Mnemonic
DMA1RST
SIO0CKD
SIO1CKD
PCICRST
SIO0RST
SIO1RST
DMARST
ACLRST
TM0RST
TM1RST
TM2RST
PIORST
⎯
⎯
SIO0 Clock
Disable
SIO1 Clock
Disable
Reserved
DMAC1 Reset
ACLC Reset
PIO Reset
DMAC Reset
PCIC Reset
TMR0 Reset
TMR1 Reset
TMR2 Reset
SIO0 Reset
SIO1 Reset
Field Name
⎯
Figure 5.2.5 Clock Control Register (2/2)
Controls clock pulses for the SIO0 controller.
0 = Supply clock pulses.
1 = Do not supply clock pulses.
Controls clock pulses for the SIO1 controller.
0 = Supply clock pulses.
1 = Do not supply clock pulses.
Resets the DMAC controller 1.
0 = Normal state
1 = Reset
Resets the AC-link controller.
0 = Normal state
1 = Reset
Note: Reset the AC-link controller when it is not asserting the
Resets the parallel IO controller.
0 = Normal state
1 = Reset
Resets the DMA controller.
0 = Normal state
1 = Reset
Resets the PCI controller.
0 = Normal state
1 = Reset
Always set this bit to 1.
Resets the TMR0 controller.
0 = Normal state
1 = Reset
Resets the TMR1 controller.
0 = Normal state
1 = Reset
Resets the TMR2 controller.
0 = Normal state
1 = Reset
Resets the SIO0 controller.
0 = Normal state
1 = Reset
Resets the SIO1 controller.
0 = Normal state
1 = Reset
interrupt and DMA request.
5-12
Description
⎯
Chapter 5 Configuration Registers
Initial Value Read/Write
0
0
0
0
0
0
0
1
0
0
0
0
0
⎯
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
⎯
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