tmpr4937 TOSHIBA Semiconductor CORPORATION, tmpr4937 Datasheet - Page 478

• Manufacturer Part Number: tmpr4937
• Description: 64-bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

31:3
Bit
2:0
15.4.12 Interrupt Mask Level Register (IRMSK)
15
31
Mnemonic
IML
⎯
Interrupt Mask
Level
Field Name
⎯
Figure 15.4.12 Interrupt Mask Register
Reserved
Interrupt Mask Level (Default: 000)
These bits specify the interrupt mask level. Masks interrupts with a mask
level equal to or lower than the set mask level.
000: Interrupt mask level 0 (No interrupts masked)
001: Interrupt mask level 1 (Levels 2-7 enabled)
010: Interrupt mask level 2 (Levels 3-7 enabled)
011: Interrupt mask level 3 (Levels 4-7 enabled)
100: Interrupt mask level 4 (Levels 5-7 enabled)
101: Interrupt mask level 5 (Levels 6-7 enabled)
110: Interrupt mask level 6 (Level 7 enabled)
111: Interrupt mask level 7 (Interrupts disabled)
Reserved
Reserved
15-32
Explanation
Chapter 15 Interrupt Controller
0xF640
3
2
R/W
IML
0
Read/Write
R/W
16
0
⎯
: Type
: Default
: Type
: Default