tmpr4937 TOSHIBA Semiconductor CORPORATION, tmpr4937 Datasheet - Page 349

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tmpr4937

Manufacturer Part Number
tmpr4937
Description
64-bit Tx System Risc
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet

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63:38
Bits
39:2
1:0
63
47
31
15
10.4.60 PDMAC PCI Bus Address Register (PDMPA)
Mnemonic
PDMPA
Reserved
PCI Bus Address
Reserved
Field Name
Reserved
Figure 10.4.58 PCI Bus Address Register
PDMAC PCI-Bus Address (Default is undefined)
The PCI Bus DMA transfer address is specified by a PCI Bus physical
address on a 32-bit address boundary. This register value is held without
being affected by a Reset.
Note: This register value is used for PCI Bus Write access during DMA
PDMPA[15:2]
transfer from the G-Bus to the PCI Bus, or it is used for PCI Bus
Read access during DMA transfer from the PCI Bus to the G-Bus.
Undefined
R/W
PDMPA[31:16]
38
Undefined
Reserved
R/W
10-91
39
Description
Chapter 10 PCI Controller
0xD210
PDMPA[39:32]
Undefined
R/W
2
Reserved
1
Read/Write
R/W
48
32
16
0
: Type
: Initial value
: Initial value
: Type
: Initial value
: Type
: Initial value
: Type

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