tmpr4937 TOSHIBA Semiconductor CORPORATION, tmpr4937 Datasheet - Page 431

• Manufacturer Part Number: tmpr4937
• Description: 64-bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

14.4.5
14.4.6
14.4.7
ACLC Interrupt Masked Status Register
used as ACLC interrupt request to the interrupt controller.
ACLC Interrupt Enable Register
initial value is all ‘0’. When a value is written to this register, the bit in the position where “1” was
written is set to “1.”
ACLC Interrupt Disable Register
When a value is written to this register, the ACINTEN register bit in the position where a “1” was
written is cleared to “0.”
Every bit in this register is configured as follows:
Bit placement is the same as for the ACINTSTS register. The logical OR of all bits in this register is
Interrupt request enable (R/W1S). Bit placement is the same as for the ACINTSTS register. Its
Interrupt request enable clear (W1C). Bit placement is the same as for the ACINTSTS register.
ACINTMSTS = ACINTSTS & ACINTEN
14-25
Chapter 14 AC-link Controller
0xF714
0xF718
0xF71C