tmpr4937 TOSHIBA Semiconductor CORPORATION, tmpr4937 Datasheet - Page 259

• Manufacturer Part Number: tmpr4937
• Description: 64-bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

10. PCI Controller
10.1 Features
10.1.1
10.1.2
bus (G-Bus).
The TX4937 PCI Controller functions as a bus bridge between the TX4937 External PCI and the internal
Overall
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Initiator Function
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Compliant to “PCI Local Bus Specification Revision 2.2”
PCI Bus: 32-bit data bus; Internal Bus: 64-bit data bus
Maximum PCI bus clock operating frequency: 66 MHz
Dual address cycle support (40-bit PCI address space)
Supports both the Initiator and Target functions
Supports power management functions that are compliant to PCI Bus Power Management Interface
Specifications Version 1.1.
On-chip PCI Bus Arbiter, can connect to a maximum of four external bus masters
1-channel on-chip DMA Controller (PDMAC) dedicated to the PCI Controller
Supports six PCI clock outputs
The Internal Bus clock and PCI Bus clock are asynchronous and can be set independently
Includes function for booting the TX4937 from memory on the PCI Bus
Can set configuration data from serial ROM
Mounted a retry function on the Internal Bus side also in order to avoid deadlock on the PCI Bus.
Single and Burst transfer from the Internal Bus to the PCI Bus
Supports memory, I/O, configuration, special cycle, and interrupt acknowledge transactions.
Address mapping between the Internal Bus and the PCI Bus can be modified
Mounted 8-stage 64-bit data one FIFO each for Read and Write
Post Write function enables quick termination of a maximum of four Write transactions by the G-
Bus without waiting for completion on the PCI Bus.
Endian switching function
10-1
Chapter 10 PCI Controller