tmpr4937 TOSHIBA Semiconductor CORPORATION, tmpr4937 Datasheet - Page 534

• Manufacturer Part Number: tmpr4937
• Description: 64-bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

1)
Disable
Disable
Disable
FIFO
By this setting, Channel B performs burst transfer. When the different off-set values are set to the
source address and destination address of Channel B, or source and destination burst inhibit bits
are set, single and burst transfer modes are combined for data transfer, but a malfunction does
not occur.
Ch. A of a bus error
<Supplemental information> Dual address transfer mode
– Single transfer:
– Burst transfer:
[Workarounds]
(a)
(b)
malfunction when the conditions (1) to (3) are satisfied.
address single transfer. Combination of 4 channels in DMAC0 or DMAC1 affects a workaround to be
required.(DMAC0 and DMAC1 are independent controllers.)
(1)
(2)
(3)
(4)
In the case only one channel is used, restarting DMS transfer without a reset of FIFO results in a
When two channels are used in a system, the following table shows settings to cause malfunctions.
Workarounds vary depending on which type of dual address transfer is performed together with dual
Any
value
Any
value
Any
value
XFSZ
Enable FIFO for all channels that perform single transfer.
(DMMCRn.FIFUM[n]=1: n=3 to 0)
After all channels finished transfers, set 1 to RSFIF in DMMCRn, then write 0 to reset and
release reset of FIFO.
Single
Single
Single
Transfer
Single Transfer
2 to 4 ch.
2 to 3 ch.
Disable FIFO (DMMCR.FIFUM[n]=0]
or the value smaller than 4DW is set to DMCCRn.XFSZ.
Enable FIFO (DMMCR.FIFUM[n]=1]
and 4DW or larger value is set to DMCCRn.XFSZ.
1 ch.
1 ch.
Disable
Enable
Enable
FIFO
Any
value
<4DW
≥4DW
XFSZ
Ch. B
23-4
Chapter 23 Notes on Use of TMPR4937
Burst Transfer
Single
Single
Burst
Transfer
1 to 3 ch.
1 to 2 ch.
Null
Null
1)
Malfunction of ch. A
Malfunction of ch. A
Malfunction of ch. A
error (without reset
in ch. A after a bus
Transfer restarted
of FIFO)
Workaround
(a) or (b)
(b)
(a)
(a)
Malfunction of ch. B
Malfunction of ch. B
Correct operation of
ch. B
Ch. B after a bus
1)
error