tmpr4937 TOSHIBA Semiconductor CORPORATION, tmpr4937 Datasheet - Page 383

• Manufacturer Part Number: tmpr4937
• Description: 64-bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

31:8
Bit
7:0
31
15
11.4.8
Mnemonic
TxD
Transmit FIFO Register 0 (SITFIFO0) 0xF31C (Ch. 0)
Transmit FIFO Register 1 (SITFIFO1) 0xF41C (Ch. 1)
Destination Address Register (DMDARn) of the DMA Controller according to the Endian Mode bit
(DMCCRn.LE) setting of the DMA Controller.
When using the DMA Controller to perform DMA transmission, set the following addresses in the
•
•
Reserved
Transmission
Data
Reserved
Field Name
Little Endian:
Big Endian:
Figure 11.4.8 Transmit FIFO Register
Transmit Data
Data written to this register are written to the Transmit FIFO.
0xF31C (Ch.0), 0xF41C (Ch.1)
0xF31F (Ch.0), 0xF41F (Ch.1)
Reserved
8
11-23
7
Description
Chapter 11 Serial I/O Port
TxD
W
⎯
16
0
Read/Write
W
: Type
: Initial value
: Type
: Initial value
⎯