tmpr4937 TOSHIBA Semiconductor CORPORATION, tmpr4937 Datasheet - Page 347

• Manufacturer Part Number: tmpr4937
• Description: 64-bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

63:36
Bits
35:3
2:0
63
47
31
15
10.4.58 PDMAC Chain Address Register (PDMCA)
Mnemonic
PDMCA
Reserved
Chain Address
Reserved
Field Name
Figure 10.4.56 PDMAC Chain Address Register
Reserved
PDMAC Chain Address (Default is undefined)
The address of the next PDMAC Data Command Descriptor to be read is
specified by a G-Bus physical address on a 64-bit address boundary. This
register value is held without being affected by a Reset.
0 value judgement is performed when the lower 32 bits of this register are
rewritten. DMA transfer is automatically initiated if the result is not “0”.
PDMCA[15:3]
Undefined
R/W
PDMCA[31:16]
Undefined
Reserved
R/W
10-89
Description
Chapter 10 PCI Controller
0xD200
36
35
3
PDMCA[35:32]
undefined
2
R/W
Reserved
Read/Write
R/W
48
32
16
0
⎯
⎯
: Type
: Initial value
: Type
: Initial value
: Type
: Initial value
: Type
: Initial value