EZ80F91MCU ZILOG [Zilog, Inc.], EZ80F91MCU Datasheet - Page 111

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EZ80F91MCU

Manufacturer Part Number
EZ80F91MCU
Description
eZ80Acclaim-TM Flash Microcontrollers
Manufacturer
ZILOG [Zilog, Inc.]
Datasheet
Figure 18. Motorola Bus Mode Write Timing Example
PS019209-0504
System Clock
ADDR[23:0]
DATA[7:0]
or IORQ
DTACK
MREQ
CSx
R/W
DS
AS
Switching Between Bus Modes
When switching bus modes between Intel™ to Motorola, Motorola to Intel™, eZ80
to Motorola, or eZ80 to Intel™, there is one extra SCLK cycle added to the bus
access. An extra clock cycle is not required for repeated access in any of the bus
modes (for example Intel™ to Intel™). An extra clock cycle is not required for
Intel™ (or Motorola) to eZ80 bus mode (under normal operation). The extra clock
cycle is not shown in the timing examples. Due to the asynchronous nature of
these bus protocols, the extra delay does not impact peripheral communication.
S0
S1
P R E L I M I N A R Y
S2
S3
S4
S5
Chip Selects and Wait States
Product Specification
S6
eZ80F91 MCU
S7
92

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