EZ80F91MCU ZILOG [Zilog, Inc.], EZ80F91MCU Datasheet - Page 376
EZ80F91MCU
Manufacturer Part Number
EZ80F91MCU
Description
eZ80Acclaim-TM Flash Microcontrollers
Manufacturer
ZILOG [Zilog, Inc.]
Datasheet
1.EZ80F91MCU.pdf
(396 pages)
- Current page: 376 of 396
- Download datasheet (5Mb)
Figure 70. Port Input Sample Timing
Figure 71. GPIO Port Output Timing
PS019209-0504
Port Output
READ on Data Bus
General Purpose I/O Port Input Sample Timing
General Purpose I/O Port Output Timing
PHI
Input Value
GPIO Input
GPIO Data
Data Latch
GPIO Pin
Figure 70 illustrates timing of the GPIO input sampling. The input value on a GPIO
port pin is sampled on the rising edge of the system clock. The port value is then
available to the CPU on the second rising clock edge following the change of the
port value.
Figure 71 and Table 240 provide timing information for GPIO port pins.
PHI
T
1
T
CLK
Data Register
Port Value
Changes to 0
Into GPIO
0 Latched
P R E L I M I N A R Y
T
CLK
Product Specification
Electrical Characteristics
GPIO Data Register
Value 0 Read
by eZ80
T
2
eZ80F91 MCU
357
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