EZ80F91MCU ZILOG [Zilog, Inc.], EZ80F91MCU Datasheet - Page 65
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EZ80F91MCU
Manufacturer Part Number
EZ80F91MCU
Description
eZ80Acclaim-TM Flash Microcontrollers
Manufacturer
ZILOG [Zilog, Inc.]
Datasheet
1.EZ80F91MCU.pdf
(396 pages)
- Current page: 65 of 396
- Download datasheet (5Mb)
Table 3. Register Map (Continued)
PS019209-0504
Address
(hex)
Universal Asynchronous Receiver/Transmitter 0 (UART0), continued
00C1
00C2
00C3
00C4
00C5
00C6
00C7
I
00C8
00C9
00CA
00CB
00CC
00CD
Notes:
2
C
1. After an external pin reset, the Watch-Dog Timer Control register is reset to 00h. After a Watch-Dog Timer time-
2. When the CPU reads this register, the current sampled value of the port is read.
3. Read Only if RTC is locked; Read/Write if RTC is unlocked.
4. After an external pin reset or a Watch-Dog Timer reset, the RTC Control register is reset to x0xxxx00b. After a
5. Read Only if Flash Memory is locked. Read/Write if Flash Memory is unlocked.
out reset, the Watch-Dog Timer Control register is reset to 20h.
an RTC Alarm sleep-mode recovery reset, the RTC Control register is reset to x0xxxx10b.
Mnemonic
UART0_IER
UART0_BRG_H
UART0_IIR
UART0_FCTL
UART0_LCTL
UART0_MCTL
UART0_LSR
UART0_MSR
UART0_SPR
I2C_SAR
I2C_XSAR
I2C_DR
I2C_CTL
I2C_SR
I2C_CCR
I2C_SRR
Name
UART 0 Interrupt Enable Register
UART 0 Baud Rate Generator
Register—High Byte
UART 0 Interrupt Identification
Register
UART 0 FIFO Control Register
UART 0 Line Control Register
UART 0 Modem Control Register
UART 0 Line Status Register
UART 0 Modem Status Register
UART 0 Scratch Pad Register
I
I
I
I
I
I
I
2
2
2
2
2
2
2
C Slave Address Register
C Extended Slave Address Register
C Data Register
C Control Register
C Status Register
C Clock Control Register
C Software Reset Register
P R E L I M I N A R Y
Reset
(hex)
XX
XX
00
00
01
00
00
00
60
00
00
00
00
00
F8
00
Product Specification
Access
eZ80F91 MCU
CPU
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
W
W
W
R
R
R
R
Register Map
Page
192
190
193
195
196
198
200
202
203
232
233
233
235
236
238
239
#
46
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