EZ80F91MCU ZILOG [Zilog, Inc.], EZ80F91MCU Datasheet - Page 137
EZ80F91MCU
Manufacturer Part Number
EZ80F91MCU
Description
eZ80Acclaim-TM Flash Microcontrollers
Manufacturer
ZILOG [Zilog, Inc.]
Datasheet
1.EZ80F91MCU.pdf
(396 pages)
- Current page: 137 of 396
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PS019209-0504
Flash Page Select Register
The msb of this register is used to select whether I/O Flash access and PAGE
ERASE operations are directed to the 512-byte information page or to the main
Flash memory array. The lower 7 bits are used to select one of the main 128
pages for PAGE ERASE or I/O operations.
To perform a PAGE ERASE, the software must set the proper page value prior to
setting the page erase bit in the Flash Control Register. In addition, each access
to the FLASH_DATA register causes an autoincrement of the Flash address
stored in the Flash Address registers (FLASH_PAGE, FLASH_ROW,
FLASH_COL). See Table 42.
Table 42. Flash Page Select Register
(FLASH_PAGE = 00FCh)
Bit
Reset
CPU Access
Note: R/W = Read/Write, R = Read Only.
Bit
Position
[7]
INFO_EN
[6:0]
FLASH_PAGE
Value Description
0
1
00h–
FFh
R/W
Flash I/O access to main Flash memory.
Flash I/O access to the information page. PAGE ERASE and
MASS ERASE operations only affect the information page.
Page address of Flash memory to be used during the PAGE
ERASE or I/O access of main Flash memory. When INFO_EN
is set to 1, this field is ignored.
P R E L I M I N A R Y
7
0
R/W
6
0
R/W
5
0
R/W
4
0
R/W
3
0
Product Specification
R/W
2
0
eZ80F91 MCU
R/W
1
0
Flash Memory
R/W
0
0
118
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