EZ80F91MCU ZILOG [Zilog, Inc.], EZ80F91MCU Datasheet - Page 339
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EZ80F91MCU
Manufacturer Part Number
EZ80F91MCU
Description
eZ80Acclaim-TM Flash Microcontrollers
Manufacturer
ZILOG [Zilog, Inc.]
Datasheet
1.EZ80F91MCU.pdf
(396 pages)
- Current page: 339 of 396
- Download datasheet (5Mb)
Phase-Locked Loop
Figure 60. Phase-Locked Loop Block Diagram
PS019209-0504
Overview
(1MHz < F
The Phase-Locked-Loop (PLL) is a programmable frequency multiplier that satis-
fies the equation SCLK (Hz) = N * F
in Figure 60.
The seven main blocks of the PLL are:
•
•
•
•
•
•
•
x2
x1
Phase Frequency Detector
Charge Pump
Voltage Controlled Oscillator
Loop Filter
Divider
MUX/CLK Sync
Lock Detect
Oscillator
PLL_INT
OSC
< 10MHz)
PLL_CTL0[3:2]
Detect
Lock
PFD
{PLL_DIV_H, PLL_DIV_L}
P R E L I M I N A R Y
(F
OSC
RTC_CLK
PLL_CTL0[7:6]
System Clock
< SCLK < F
SCLK-MUX
Charge
Pump
Div N
OSC
OSC
(Hz). A diagram of the PLL block is shown
* N)
VCO
PLL_CTL1[0] = PLL Enable
Product Specification
C
Loop Filter
PLL1
Off-Chip
Phase-Locked Loop
eZ80F91 MCU
R
C
PLL
PLL2
320
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