EZ80F91MCU ZILOG [Zilog, Inc.], EZ80F91MCU Datasheet - Page 237

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EZ80F91MCU

Manufacturer Part Number
EZ80F91MCU
Description
eZ80Acclaim-TM Flash Microcontrollers
Manufacturer
ZILOG [Zilog, Inc.]
Datasheet
PS019209-0504
Table 116. SPI Transmit Shift Register
(SPI_TSR = 00BCh)
SPI Receive Buffer Register
The SPI Receive Buffer register (SPI_RBR) is used by the SPI slave to receive
data from the serial bus. The SPIF bit must be cleared prior to a second transfer of
data from the shift register; otherwise, an overrun condition exists. In the event of
an overrun, the byte that causes the overrun is lost.
The SPI Receive Buffer Read Only register shares the same address space as
the SPI Transmit Shift Write Only register. See Table 117.
Table 117. SPI Receive Buffer Register
(SPI_RBR = 00BCh)
Bit
Reset
CPU Access
Note: W = Write Only.
Bit
Position
[7:0]
TX_DATA
Bit
Reset
CPU Access
Note: R = Read Only.
Bit
Position
[7:0]
RX_DATA
Value Description
00h–
FFh
Value Description
00h–
FFh
W
SPI transmit data.
SPI received data.
P R E L I M I N A R Y
X
X
R
7
7
W
R
6
X
6
X
W
R
X
X
5
5
W
R
X
X
4
4
W
R
X
X
3
3
Product Specification
Serial Peripheral Interface
W
R
X
X
2
2
eZ80F91 MCU
W
X
X
R
1
1
W
X
X
R
0
0
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