EZ80F91MCU ZILOG [Zilog, Inc.], EZ80F91MCU Datasheet - Page 256
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EZ80F91MCU
Manufacturer Part Number
EZ80F91MCU
Description
eZ80Acclaim-TM Flash Microcontrollers
Manufacturer
ZILOG [Zilog, Inc.]
Datasheet
1.EZ80F91MCU.pdf
(396 pages)
- Current page: 256 of 396
- Download datasheet (5Mb)
PS019209-0504
Note:
Table 129. I
If an illegal condition occurs on the I
code
set and the IFLG bit cleared. The I
dition is transmitted on the I
The STP and STA bits can be set to 1 at the same time to recover from the bus
error. The I
Code
38h
40h
48h
50h
58h
60h
68h
70h
78h
80h
88h
90h
98h
A0h
A8h
B0h
B8h
C0h
C8h
D0h
D8h
F8h
00h
). To recover from this state, the STP bit in the I2C_CTL register must be
Status
Arbitration lost in address or data byte.
Address and Read bit transmitted, ACK received.
Address and Read bit transmitted, ACK not received.
Data byte received in MASTER mode, ACK transmitted.
Data byte received in MASTER mode, NACK transmitted.
Slave address and Write bit received, ACK transmitted.
Arbitration lost in address as master, slave address and Write bit received,
ACK transmitted.
General Call address received, ACK transmitted.
Arbitration lost in address as master, General Call address received, ACK
transmitted.
Data byte received after slave address received, ACK transmitted.
Data byte received after slave address received, NACK transmitted.
Data byte received after General Call received, ACK transmitted.
Data byte received after General Call received, NACK transmitted.
STOP or repeated START condition received in SLAVE mode.
Slave address and Read bit received, ACK transmitted.
Arbitration lost in address as master, slave address and Read bit received,
ACK transmitted.
Data byte transmitted in SLAVE mode, ACK received.
Data byte transmitted in SLAVE mode, ACK not received.
Last byte transmitted in SLAVE mode, ACK received.
Second Address byte and Write bit transmitted, ACK received.
Second Address byte and Write bit transmitted, ACK not received.
No relevant status information, IFLG = 0.
2
2
C Status Codes (Continued)
C then sends a START condition.
P R E L I M I N A R Y
2
C bus.
2
C then returns to an idle state. No STOP con-
2
C bus, the bus error state is entered (status
Product Specification
I
2
C Serial I/O Interface
eZ80F91 MCU
237
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