EZ80F91MCU ZILOG [Zilog, Inc.], EZ80F91MCU Datasheet - Page 54

• Manufacturer Part Number: EZ80F91MCU
• Description: eZ80Acclaim-TM Flash Microcontrollers
• Manufacturer: ZILOG [Zilog, Inc.]

Register Map
Table 3. Register Map
PS019209-0504
Address
(hex)
Product ID
0000
0001
0002
Interrupt Priority
0010
0011
0012
0013
0014
0015
Notes:
1. After an external pin reset, the Watch-Dog Timer Control register is reset to 00h. After a Watch-Dog Timer time-
2. When the CPU reads this register, the current sampled value of the port is read.
3. Read Only if RTC is locked; Read/Write if RTC is unlocked.
4. After an external pin reset or a Watch-Dog Timer reset, the RTC Control register is reset to x0xxxx00b. After a
5. Read Only if Flash Memory is locked. Read/Write if Flash Memory is unlocked.
out reset, the Watch-Dog Timer Control register is reset to 20h.
an RTC Alarm sleep-mode recovery reset, the RTC Control register is reset to x0xxxx10b.
Mnemonic
ZDI_ID_L
ZDI_ID_H
ZDI_ID_REV
INT_P0
INT_P1
INT_P2
INT_P3
INT_P4
INT_P5
All on-chip peripheral registers are accessed in the I/O address space. All I/O
operations employ 16-bit addresses. The upper byte of the 24-bit address bus is
undefined during all I/O operations (ADDR[23:16] = UU). All I/O operations using
16-bit addresses within the range
erals. External I/O Chip Selects are not generated if the address space pro-
grammed for the I/O Chip Selects overlaps the
Registers at unused addresses within the
chip peripherals are not implemented. Read access to such addresses returns
unpredictable values and Write access produces no effect. Table 3 diagrams the
register map for the eZ80F91 device.
Name
eZ80 Product ID Low Byte Register
eZ80 Product ID High Byte Register
eZ80 Product ID Revision Register
Interrupt Priority Register—Byte 0
Interrupt Priority Register—Byte 1
Interrupt Priority Register—Byte 2
Interrupt Priority Register—Byte 3
Interrupt Priority Register—Byte 4
Interrupt Priority Register—Byte 5
P R E L I M I N A R Y
0000h–00FFh
0000h–00FFh
0000h–00FFh
are routed to the on-chip periph-
Reset
(hex)
range assigned to on-
XX
08
00
00
00
00
00
00
00
Product Specification
address range.
Access
eZ80F91 MCU
CPU
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R
Register Map
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