EZ80F91MCU ZILOG [Zilog, Inc.], EZ80F91MCU Datasheet - Page 309

• Manufacturer Part Number: EZ80F91MCU
• Description: eZ80Acclaim-TM Flash Microcontrollers
• Manufacturer: ZILOG [Zilog, Inc.]

Figure 55. ZDI Address Write Timing
PS019209-0504
ZDA
ZCL
ZDI Register Addressing
START
Signal
cal 1). For more information on accepting bus requests in ZDI DEBUG mode,
please see the
Following a START signal the ZDI master must output the ZDI register address.
All data transfers with the ZDI block use special ZDI registers. The ZDI control
registers that reside in the ZDI register address space should not be confused
with the eZ80F91 device peripheral registers that reside in the I/O address space.
Many locations in the ZDI control register address space are shared by two regis-
ters—one for Read Only access and one for Write Only access. As an example, a
Read from ZDI register address
a Write to this same location,
match values used for generating break points.
The format for a ZDI address is seven bits of address, followed by one bit for
Read or Write control, and completed by a single-bit byte separator. The ZDI exe-
cutes a Read or Write operation depending on the state of the R/W bit (0 = Write,
1 = Read). If no new START command is issued at completion of the Read or
Write operation, the operation can be repeated. This allows repeated Read or
Write operations without having to resend the ZDI command. A START signal
must follow to initiate a new ZDI command. Figure 55 illustrates the timing for
address Writes to ZDI registers.
S
msb
A6
1
Bus Requests During ZDI Debug Mode
A5
2
A4
3
P R E L I M I N A R Y
ZDI Address Byte
00h
A3
4
00h
, stores the Low byte of one of the address
returns the eZ80 Product ID Low Byte, while
A2
5
A1
6
A0
lsb
7
section on page 293.
0 = WRITE
1 = READ
Product Specification
R/W
8
Byte Separator
ZiLOG Debug Interface
START Signal
or new ZDI
Single-Bit
eZ80F91 MCU
0/1
9
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