EZ80F91MCU ZILOG [Zilog, Inc.], EZ80F91MCU Datasheet - Page 164
EZ80F91MCU
Manufacturer Part Number
EZ80F91MCU
Description
eZ80Acclaim-TM Flash Microcontrollers
Manufacturer
ZILOG [Zilog, Inc.]
Datasheet
1.EZ80F91MCU.pdf
(396 pages)
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PS019209-0504
Timer Input Capture Value A Register—Low Byte
The Timer x Input Capture Value A Register—Low Byte, detailed in Table 62,
stores the Low byte of the capture value for external input A. For Timer 1, the
external input is IC0. For Timer 3, it is IC2.
Table 62. Timer Input Capture Value Register A—Low Byte
(TMR1_CAPA_L = 006Bh, TMR3_CAPA_L = 007Ch)
[3:2]
CAP_EDGE_B
[1:0]
CAP_EDGE_A
Bit
Reset
CPU Access
Note: R = Read only.
Bit
Position
[7:0]
TMR
x
_CAPA_L
00
01
10
11
00
01
10
11
Value
00h–FFh These bits represent the Low byte of the 2-byte capture
P R E L I M I N A R Y
R
7
0
Disable capture on ICB.
Enable capture only on the falling edge of ICB.
Enable capture only on the rising edge of ICB.
Enable capture on both edges of ICB.
Disable capture on ICA.
Enable capture only on the falling edge of ICA
Enable capture only on the rising edge of ICA.
Enable capture on both edges of ICA.
Description
value, {TMR
is bit 7 of the 16-bit data value. Bit 0 is bit 0 (lsb) of the 16-
bit timer data value.
R
6
0
x
R
_CAPA_H[7:0], TMR
5
0
R
4
0
R
3
0
Programmable Reload Timers
Product Specification
x
_CAPA_L[7:0]}. Bit 7
R
2
0
eZ80F91 MCU
R
1
0
R
0
0
145
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