EZ80F91MCU ZILOG [Zilog, Inc.], EZ80F91MCU Datasheet - Page 255

• Manufacturer Part Number: EZ80F91MCU
• Description: eZ80Acclaim-TM Flash Microcontrollers
• Manufacturer: ZILOG [Zilog, Inc.]

PS019209-0504
I
The I2C_SR register is a Read Only register that contains a 5-bit status code in
the five most-significant bits; the three least-significant bits are always 0. The
Read Only I2C_SR registers share the same I/O addresses as the Write Only
I2C_CCR registers. See Table 128.
Table 128. I
(I2C_SR = 00CCh)
There are 29 possible status codes, as listed in Table 129. When the I2C_SR reg-
ister contains the status code
interrupt is generated, and the IFLG bit in the I2C_CTL register is not set. All other
status codes correspond to a defined state of the I
When each of these states is entered, the corresponding status code appears in
this register and the IFLG bit in the I2C_CTL register is set to 1. When the IFLG bit
is cleared, the status code returns to
Table 129. I
Bit
Reset
CPU Access
Note: R = Read only.
Bit
Position
[7:3]
STAT
[2:0]
Code
00h
08h
10h
18h
20h
28h
30h
2
C Status Register
Status
Bus error.
START condition transmitted.
Repeated START condition transmitted.
Address and Write bit transmitted, ACK received.
Address and Write bit transmitted, ACK not received.
Data byte transmitted in MASTER mode, ACK received.
Data byte transmitted in MASTER mode, ACK not received.
2
2
C Status Registers
C Status Codes
Value
00000–
11111
000
P R E L I M I N A R Y
R
7
1
Description
5-bit I
Reserved.
F8h
R
6
1
2
, no relevant status information is available, no
C status code.
F8h
R
5
1
.
R
4
1
2
C.
R
3
1
Product Specification
R
2
0
I
2
C Serial I/O Interface
eZ80F91 MCU
R
1
0
R
0
0
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