EZ80F91MCU ZILOG [Zilog, Inc.], EZ80F91MCU Datasheet - Page 60
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EZ80F91MCU
Manufacturer Part Number
EZ80F91MCU
Description
eZ80Acclaim-TM Flash Microcontrollers
Manufacturer
ZILOG [Zilog, Inc.]
Datasheet
1.EZ80F91MCU.pdf
(396 pages)
- Current page: 60 of 396
- Download datasheet (5Mb)
Table 3. Register Map (Continued)
PS019209-0504
Address
(hex)
Timers and PWM, continued
0078
0079
007A
007B
007C
007D
007E
007F
0080
Notes:
1. After an external pin reset, the Watch-Dog Timer Control register is reset to 00h. After a Watch-Dog Timer time-
2. When the CPU reads this register, the current sampled value of the port is read.
3. Read Only if RTC is locked; Read/Write if RTC is unlocked.
4. After an external pin reset or a Watch-Dog Timer reset, the RTC Control register is reset to x0xxxx00b. After a
5. Read Only if Flash Memory is locked. Read/Write if Flash Memory is unlocked.
out reset, the Watch-Dog Timer Control register is reset to 20h.
an RTC Alarm sleep-mode recovery reset, the RTC Control register is reset to x0xxxx10b.
Mnemonic
TMR3_DR_H
TMR3_RR_H
PWM_CTL1
PWM_CTL2
PWM_CTL3
TMR3_CAP_CTL
PWM0R_L
TMR3_CAPA_L
PWM0R_H
TMR3_CAPA_H
PWM1R_L
TMR3_CAPB_L
PWM1R_H
TMR3_CAPB_H
PWM2R_L
TMR3_OC_CTL1
Name
Timer 3 Data Register—High Byte
Timer 3 Reload Register—High Byte
PWM Control Register 1
PWM Control Register 2
PWM Control Register 3
Timer 3 Input Capture Control Register
PWM 0 Rising-Edge Register—Low
Byte
Timer 3 Capture Value A Register—
Low Byte
PWM 0 Rising-Edge Register—High
Byte
Timer 3 Capture Value A Register—
High Byte
PWM 1 Rising-Edge Register—Low
Byte
Timer 3 Capture Value B Register—
Low Byte
PWM 1 Rising-Edge Register—High
Byte
Timer 3 Capture Value B Register—
High Byte
PWM 2 Rising-Edge Register—Low
Byte
Timer 3 Output Compare Control
Register 1
P R E L I M I N A R Y
Reset
(hex)
XX
XX
XX
XX
XX
XX
XX
XX
XX
XX
XX
00
00
00
00
00
Product Specification
Access
eZ80F91 MCU
CPU
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
W
R
Register Map
Page
143
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144
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162
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#
41
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