EZ80F91MCU ZILOG [Zilog, Inc.], EZ80F91MCU Datasheet - Page 269
EZ80F91MCU
Manufacturer Part Number
EZ80F91MCU
Description
eZ80Acclaim-TM Flash Microcontrollers
Manufacturer
ZILOG [Zilog, Inc.]
Datasheet
1.EZ80F91MCU.pdf
(396 pages)
- Current page: 269 of 396
- Download datasheet (5Mb)
PS019209-0504
Table 136. EMAC Test Register
(EMAC_ TEST = 0020h)
Bit
Reset
CPU Access
Note: R/W = Read/Write, R = Read Only.
Bit
Position
7
6
TEST_FIFO
5
TxRx_SEL
4
SSTC
3
SIMR
2
FRC_OVR_ERR
1
FRC_UND_ERR
0
LPBK
Value
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
P R E L I M I N A R Y
R
7
0
Description
Reserved.
FIFO test mode disabled—normal operation.
FIFO test mode enabled.
Select the Receive FIFO when FIFO test mode is enabled.
Select the Transmit FIFO when FIFO test mode is enabled.
Normal operation.
Short Cut Slot Timer Counter. Slot time is shortened to
speed up simulation.
Normal operation.
Simulation Reset.
Normal operation.
Force Overrun error in Receive FIFO.
Normal operation.
Force Underrun error in Transmit FIFO.
Normal operation.
EMAC Transmit interface is looped back into EMAC
Receive interface.
R/W
6
0
R/W
5
0
R/W
4
0
R/W
Ethernet Media Access Controller
3
0
Product Specification
R/W
2
0
eZ80F91 MCU
R/W
1
0
R/W
0
0
250
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