EZ80F91MCU ZILOG [Zilog, Inc.], EZ80F91MCU Datasheet - Page 225

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EZ80F91MCU

Manufacturer Part Number
EZ80F91MCU
Description
eZ80Acclaim-TM Flash Microcontrollers
Manufacturer
ZILOG [Zilog, Inc.]
Datasheet
Figure 38. Infrared Data Reception
PS019209-0504
UART_RxD
Baud Rate
Jitter
Infrared Encoder/Decoder Signal Pins
Note:
IR_RxD
8-clock
delay
Clock
High (1) for the full 16-clock period. If the data to be received is a logical 0, a 3-
clock Low (0) pulse is output following a 7-clock High (1) period. Following the 3-
clock Low pulse is a 6-clock High pulse to complete the full 16-clock data period.
Data transmission is illustrated in Figure 38.
The infrared encoder/decoder samples the incoming IR pulses using the baud
rate clock divided by 16. This sampling rate can be insufficient to capture the
incoming pulses when they use a short pulse (1.6 µs) format and low data rates.
When the external transmitter sends a short pulse of 3 clocks of 16 clock periods
(IR_RxD), the infrared encoder/decoder receives the data properly.
Due to the inherent sampling of the received IR_RxD signal by the Bit Rate Clock,
some jitter can be expected on the first bit in any sequence of data. However, all
subsequent bits in the received data stream are a fixed 16 clock periods wide.
The endec signal pins, IR_TxD and IR_RxD, are multiplexed with General-Pur-
pose I/O (GPIO) pins. These GPIO pins must be configured for alternate function
operation for the endec to operate.
The remaining six UART0 pins, CTS0, DCD0, DSR0, DTR0, RTS and RI0, are not
required for use with the endec. The UART0 modem status interrupt should be
disabled to prevent unwanted interrupts from these pins. The GPIO pins corre-
sponding to these six unused UART0 pins can be used for inputs, outputs, or
Start Bit = 0
16-clock
period
1.6 µs
min. pulse
16-clock
period
Data Bit 0 = 1
P R E L I M I N A R Y
16-clock
period
Data Bit 1 = 0
16-clock
period
Data Bit 2 = 1
16-clock
period
Product Specification
Infrared Encoder/Decoder
Data Bit 3 = 1
eZ80F91 MCU
206

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