PEB20571 INFINEON [Infineon Technologies AG], PEB20571 Datasheet - Page 101
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PEB20571
Manufacturer Part Number
PEB20571
Description
ICs for Communications
Manufacturer
INFINEON [Infineon Technologies AG]
Datasheet
1.PEB20571.pdf
(291 pages)
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The IOMU meets the IOM-2 interface timing specifications as described below.
Single Data Rate DCL Mode
• Serial transmission via DD0/DD1 with every DCL rising edge
• Sampling of the incoming serial data (DU0/DU1) with every DCL falling edge
• Sampling FSC with every DCL falling edge. Sampling of FSC = 1 after sampling of
Double Data Rate DCL Mode
• Two DCL cycles per bit (the bits are aligned to the frame start)
• Serial transmission via DU0/1 with every second DCL rising edge.
• Sampling of incoming serial data (DD0/1) with the second DCL falling edge of each bit.
• Sampling of FSC every DCL falling edge. Sampling of FSC = 1 after sampling of
Figure 4-4 shows the IOM-2 interface timing with single and double rate DCL. For more
details refer to the general IOM-2 interface description.
Preliminary Data Sheet
Table 4-5
Single/Double
Rate DCL Mode
Single
Double
FSC = 0 is considered to be the start of a frame.
FSC = 0, is considered to be the start of a new frame.
DCL Frequency in Different IOM-2 Modes
2x384 kbit/s
384 kHz
768 kHz
2x768 kbit/s
1536 kHz
768 kHz
4-17
IOM-2 Mode
2x2.048 Mbit/s 1x4.096 Mbit/s
2.048 MHz
4.096 MHz
Functional Description
4.096 MHz
8.192 MHz
PEB 20571
DELIC
2003-08
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