PEB20571 INFINEON [Infineon Technologies AG], PEB20571 Datasheet - Page 106

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PEB20571

Manufacturer Part Number
PEB20571
Description
ICs for Communications
Manufacturer
INFINEON [Infineon Technologies AG]
Datasheet

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Preliminary Data Sheet
4.4.1
Figure 4-9
The PCM-unit signals share port pins with the GHDLC-unit. A multiplexer controlled by
register MUXCTRL allows to define the required functionality.
4.4.1.1
The main task of the PCMU is the serial-to-parallel conversion of incoming data to a
parallel data format (and vice versa) which is directly read by the DSP. This access is
required for the DSP to perform switching of B-channels.
The data conversion in the PCMU is done by frame-wise swapping based on a circular
buffer structure. During each 8 kHz frame, one buffer is assigned to the PCMU (I-buffer),
and the other one to the DSP (D-buffer). At the end of every frame, the buffers are
swapped.
4.4.1.2
The logical partitioning of each frame buffer into input and output blocks is determined
according to the requested data rate as shown in the table below.
The address of each data byte in the I-buffer output blocks by the DSP must be selected
according to the PCM port and time slot index, in which it should be transmitted.
TRANSIU
IOM Unit
HDLC
Unit
PCMU Functional and Operational Description
Frame-Wise Buffer Swapping
DSP Inaccessible Buffer (I-buffer)
PCMU Integration in DELIC
DSP OAK
Memory
PCM Unit
GHDLC
Unit
4-22
+
MUX
Functional Description
PCM interface
TSC3
RXD3, TXD3
PDC, PFS
TSC2
RXD0, TXD0, TSC0
RXD1, TXD1, TSC1
RXD2, TXD2
DELIC
2003-08

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