PEB20571 INFINEON [Infineon Technologies AG], PEB20571 Datasheet - Page 235

• Manufacturer Part Number: PEB20571
• Description: ICs for Communications
• Manufacturer: INFINEON [Infineon Technologies AG]

11
The following chapters describe the way of communication between DELIC and an
external µP via the mailbox. If no DMA is used the general mailbox contains 32 data
registers. If DMA is used there are actually two different mailboxes. In this case the DMA
mailbox consists of 16 data registers and the general mailbox also contains 16 data
registers.
For more details especially initialization of the different units refer to the provided
application notes.
Note: As a reference, ELIC registers with similar functionality are appended in brackets.
11.1
11.1.1
The general mailbox for transmit direction (Figure 11-1) consists of 20 (36) registers.
One register (MCMD) contains the command to be processed by the DELIC. Another
register (MBUSY) just consists of a Busy Bit indicating whether the mailbox is free to be
written to or not. Two other registers (MGEN Low and MGEN High) serve for general
parameters. A block of 16 (32) parameter registers contains data. Writing to the
command register sets the Busy Bit and thereby an interrupt in the DELIC. If the DELIC
has processed the command it clears the Busy Bit to release the mailbox.
11.1.2
The mailbox for receive direction (Figure 11-2) consists of 20 (36) registers. One register
(OCMD) contains the indication to be processed by the µP. Another register (OBUSY)
just consists of a Busy Bit which has to be cleared by the µP after processing the
indication in order to release the mailbox. Two other registers (OGEN Low and OGEN
High) serve as general parameters. A block of 16 (32) parameter registers contains data
associated with the indication.
Preliminary Data Sheet
Mailbox Protocol Description
Mailbox Access
Mailbox Access Transmit Direction (µP->DELIC)
Mailbox Access Receive Direction (DELIC->µP)
11-1
Mailbox Protocol Description
PEB 20571
DELIC
2003-08