PEB20571 INFINEON [Infineon Technologies AG], PEB20571 Datasheet - Page 34

• Manufacturer Part Number: PEB20571
• Description: ICs for Communications
• Manufacturer: INFINEON [Infineon Technologies AG]

Table 2-4
Pin
No.
13
14
15
7
6
5
Preliminary Data Sheet
Symbol In (I)
WR/
R/W
RD/
DS
ALE
MODE
IREQ
IACK
Microprocessor Bus Interface Pins (DELIC-LC) (Continued)
Out (O)
I
I
I
I
O
(OD)
I
During
Reset
I
I
I
I
High Z
(OD)
I
After
Reset
I
I
I
I
High Z
(OD)
I
2-7
Function
Write (Intel/Siemens Mode)
Indicates a write access.
Read/Write (Motorola Mode)
Indicates the direction of the data
transfer
Read (Intel/Siemens Mode)
Indicates a read access.
Data Strobe (Motorola Mode)
During a read cycle, DS indicates that
the DELIC should place valid data on
the bus. During a write access, DS
indicates that valid data is on the bus.
Address Latch Enable
Controls the on-chip address latch in
multiplexed bus mode. While ALE is
’high’, the latch is transparent. The
falling
address. ALE is also evaluated to
determine
(’low’=multiplexed,
’high’=demultiplexed)
Bus Mode Selection
Selects the µP bus mode
(’low’=Intel/Infineon, ’high’=Motorola)
Interrupt Request is programmable to
push/pull (active high or low) or open-
drain. This signal is activated when the
DELIC requests a µP interrupt. When
operated in open drain mode, multiple
interrupt sources may be connected.
Interrupt Acknowledge
edge
the
latches
Pin Descriptions
bus
the
PEB 20571
current
DELIC
2003-08
mode