PEB20571 INFINEON [Infineon Technologies AG], PEB20571 Datasheet - Page 215

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PEB20571

Manufacturer Part Number
PEB20571
Description
ICs for Communications
Manufacturer
INFINEON [Infineon Technologies AG]
Datasheet

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9
9.1
For TTL and CMOS voltage levels refer to the relevant JEDEC specifications, e.g. to
JEDEC8-A for 3V/3.3V devices which are 5V compatible.
Note: The complete AC characteristics will be provided after the electrical
9.2
µP accesses of the DELIC are performed by an activation of the address and CS.
• By driving the MODE pin ‘high’ the user selects Motorola mode, by driving it ‘low’ -
• In Intel/Infineon mode, a distinction is needed between working in multiplexed
9.2.1
In this mode R/W distinguishes between Read and Write interactions, and DS is used for
timing.
Preliminary Data Sheet
Intel/Infineon mode. The pin is sampled during the rising edge of RESET.
address/data bus mode and de-multiplexed address and data bus mode. In Motorola
Mode, only de-multiplexed buses are used. The selection between multiplexed and
de-multiplexed bus configurations is done by using the ALE pin.
characterization of the device.
All timing shown are preliminary.
Timing Diagrams
General
µP Access Timing
µP Access Timing in Motorola mode
9-1
Timing Diagrams
DELIC
2003-08

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