PEB20571 INFINEON [Infineon Technologies AG], PEB20571 Datasheet - Page 129

• Manufacturer Part Number: PEB20571
• Description: ICs for Communications
• Manufacturer: INFINEON [Infineon Technologies AG]

4.10
4.10.1
This Mailbox is used for DMA transfers of data in “memory-to-memory” or “flyby” modes.
In a special mode, it may be used as an extension to the General Purpose Mailbox.
The transfer is done similarly to the general Mailbox, with some differences:
1. There are 2 configurations: DMA, and secondary Mailbox.
2. The master of the transfer in DMA mode is always the OAK.
The DMA Mailbox includes two separate parts:
• Transmit µP) Mailbox for fast transfers from the DMA (µP) to the GHDLC (OAK).
• Receive (OAK) Mailbox for fast transfers from the GHDLC (OAK) to the DMA (µP).
In transactions between µP and OAK the later indicates when it is ready for transmit /
receive operation by driving DREQT/DREQR high, and µP replies by driving DACK low.
DACK acts like a Chip Select signal and remains low during the whole transaction. By
driving DACK high the DMA may stop the transaction on any stage, even if the data
transfer has not finished yet.
There are two possible modes in DMA transfers: Memory-to-memory and Flyby.
Selecting these modes is done by writing “1” or “0” to the Configuration Register.
The mode of DMA’s operation depends on the µP that initiates a DMA transfer (Intel/
Siemens or Motorola). This mode information is provided via the MODE input pin of the
DELIC.
The number of bytes (words) to be transferred is written to TX_CREG and copied to
TX_COUNT.
After finishing a transaction, INT1 is issued to the DSP in order to indicate that the
Mailbox is empty and available for the next operation.
4.10.2
In Intel/Siemens mode the control lines are DACK, RD, WR . Driving RD low when DACK
is low causes a ‘Read’ from the Mailbox. Driving WR low when DACK is low causes a
‘Write’ to the Mailbox.
In Motorola mode the control lines are DACK, R/W, DS. Driving R/W high when DACK
and DS are low causes a ‘Read’ from the Mailbox. Driving R/W low when DACK and DS
are low causes a ‘Write’ to the Mailbox.
4.10.3
In Fly-By mode DMA transfer is done in one bus transaction. The DMA should provide a
‘Read’ command to the Mailbox and, at the same time, a ‘Write’ command to the system
memory (or a ‘Write’ to the Mailbox and a ‘Read’ to the memory). The system memory
Preliminary Data Sheet
DMA Mailbox
Overview
Intel/Siemens Mode and Motorola Mode (Memory-to-Memory)
Fly-By Mode
4-45
Functional Description
PEB 20571
DELIC
2003-08