PEB20571 INFINEON [Infineon Technologies AG], PEB20571 Datasheet - Page 90

• Manufacturer Part Number: PEB20571
• Description: ICs for Communications
• Manufacturer: INFINEON [Infineon Technologies AG]

It is inserted by the VIP according to the Balancing Bit Control (BBC) bit sent to the VIP
by the DELIC via the CMD line.
In receive (upstream) direction, the DC balancing bit is received on the line, but not
evaluated
4.2.5
4.2.5.1
On the U
In the transmit direction the LF-bit is inserted by the TRANSIU at the beginning of every
transmitted U
first '1' (LF-bit) in the data stream on IOM-2000 DX line together with the 8 kHz IOM-2000
FSC pulse. This is required due to the 8 kHz clock rate of the FSC signal in comparison
to the 4 kHz frame length in the U
The code violation in the LF position is generated by the VIP when INFO1 is transmitted,
according to the DSP command bits SMINI(2:0).
In the receive direction the first ‘1’ recognized on the line after “no signal”, which is
represented by logic ‘0’, is treated as the LF-bit. The code violation in the LF-bit position
is recognized by the VIP when INFO 2 is received. This information is forwarded to the
DELIC as part of the VIP receiver status bits RxSTA(1:0).
4.2.5.2
On the U
included at the M-bit position. Every fourth M-bit, a code violation indicates the start of a
new multiframe.
In transmit direction, the VIP extracts the multiframe bits out of the IOM-2000 data
coming from DELIC and inserts them in the U
In receive direction, the VIP extracts the multiframe bits out of the data coming from the
U
A multiframe counter in the VIP guarantees the timing of the multiframe. It is
synchronized (reset) every 20th U
command bit ’SH_FSC’ issued by the DELIC.
Note: The SH_FSC bit performs the functionality of the short FSC pulse in OCTAT-P
T-bit
The T-bit received on the U
(DR) line at the multiframe (M-bit) position in every frame; i.e. not only at the usual T-bit
position every third frame, but also at the S-bit position and the code violation (CV)
Preliminary Data Sheet
PN
line and inserts them in the IOM-2000 frame to the DELIC.
and QUAT-S.
PN
PN
U
Framing Bit (LF-Bit)
Multiframing Bit (M-Bit)
interface the framing (LF) bit is always logical ‘1’.
interface, multiframes are composed of four U
PN
PN
Mode Control and Framing Bits on IOM-2000
frame. The VIP assumes the start of the U
PN
line is inserted by the VIP in the IOM-2000 data receive
PN
PN
interface.
frame (=every 40th IOM-2000 frame) by the
4-6
PN
frame at the line side.
PN
PN
frames. The multiframe is
frame when detecting the
Functional Description
PEB 20571
DELIC
2003-08