PEB20571 INFINEON [Infineon Technologies AG], PEB20571 Datasheet - Page 6
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PEB20571
Manufacturer Part Number
PEB20571
Description
ICs for Communications
Manufacturer
INFINEON [Infineon Technologies AG]
Datasheet
1.PEB20571.pdf
(291 pages)
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Quantity
Price
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Part Number:
PEB20571F
Manufacturer:
INFINEON
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17
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Manufacturer:
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Quantity:
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Part Number:
PEB20571F V3.1
Manufacturer:
Infineon
Quantity:
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Company:
Part Number:
PEB20571FV3.1
Manufacturer:
INFINEON
Quantity:
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Company:
Part Number:
PEB20571FV3.1
Manufacturer:
INF
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Part Number:
PEB20571FV3.1
Manufacturer:
INFINEON/英飞凌
Quantity:
20 000
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Table of Contents
4.2.4.3
4.2.4.4
4.2.5
4.2.5.1
4.2.5.2
4.2.5.3
4.2.6
4.2.7
4.2.7.1
4.2.7.2
4.2.7.3
4.3
4.3.1
4.3.2
4.3.2.1
4.3.2.2
4.3.2.3
4.3.2.4
4.3.2.5
4.3.2.6
4.3.2.7
4.3.2.8
4.4
4.4.1
4.4.1.1
4.4.1.2
4.4.1.3
4.4.1.4
4.4.1.5
4.4.1.6
4.4.1.7
4.5
4.6
4.6.1
4.6.2
4.6.2.1
4.6.2.2
4.6.2.3
4.6.2.4
4.6.2.5
4.7
4.7.1
Preliminary Data Sheet
IOM-2 Unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-14
PCM Unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-21
A-law/µ-law Conversion Unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-29
HDLC Unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-30
GHDLC Unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-34
UPN Mode Control and Framing Bits on IOM-2000 . . . . . . . . . . . . . . . 4-6
IOM-2000 Command and Status Interface . . . . . . . . . . . . . . . . . . . . . . 4-7
IOM-2000 Data Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-11
IOMU Overview of Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-14
IOMU Functional and Operational Description . . . . . . . . . . . . . . . . . . 4-15
PCMU Functional and Operational Description . . . . . . . . . . . . . . . . . . 4-22
HDLCU Unit Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-30
DSP Operation of the HDLCU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-31
GHDLC Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-34
Fa/N Bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-5
DC-Balancing Bit (L-Bit) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-5
Framing Bit (LF-Bit) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-6
Multiframing Bit (M-Bit) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-6
DC-Balancing Bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-7
UPN Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-11
UPN Scrambler/Descrambler . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-11
S/T Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-12
Frame-Wise Buffer Swapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-15
I-buffer Logical Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-15
DSP Access to the D-Buffer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-16
IOM-2 Interface Data Rate Modes . . . . . . . . . . . . . . . . . . . . . . . . . . 4-16
IOMU Serial Data Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-18
IOMU Parallel Data Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-18
IOM-2 Push-Pull and Open-Drain Modes . . . . . . . . . . . . . . . . . . . . 4-19
Support of DRDY Signal from QUAT-S . . . . . . . . . . . . . . . . . . . . . . 4-20
Frame-Wise Buffer Swapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-22
DSP Inaccessible Buffer (I-buffer) . . . . . . . . . . . . . . . . . . . . . . . . . . 4-22
DSP Accessible Buffer (D-Buffer) . . . . . . . . . . . . . . . . . . . . . . . . . . 4-23
PCMU Interface Data Rate Modes . . . . . . . . . . . . . . . . . . . . . . . . . 4-24
PCMU Serial Data Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-25
PCMU Parallel Data Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-25
PCMU Tri-state Control Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-26
Initialization of the HDLCU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-31
Transmitting a Message . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-31
Ending a Transmission . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-32
Aborting a Transmission . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-32
DSP Access to the HDLCU Buffers . . . . . . . . . . . . . . . . . . . . . . . . . 4-32
VI
PEB 20571
DELIC
2003-08
Page
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