PEB20571 INFINEON [Infineon Technologies AG], PEB20571 Datasheet - Page 107

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PEB20571

Manufacturer Part Number
PEB20571
Description
ICs for Communications
Manufacturer
INFINEON [Infineon Technologies AG]
Datasheet

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Note: In 1 x 16.384 Mbit/s only the first half of the frame is saved in the buffer
4.4.1.3
The D-buffer is mapped to a fixed DSP address space. Every DSP access to the D-buffer
space is directed automatically to the appropriate sub-buffer.
Preliminary Data Sheet
Table 4-8
Data Rate
related port
4 x 2.048 Mbit/s
2 x 4.096 Mbit/s
1 x 8.192 Mbit/s
1 x 16.384 Mbit/s A000
Table 4-7
Data Rate
related port
4 x 2.048 Mbit/s
2 x 4.096 Mbit/s
1 x 8.192 Mbit/s
1 x 16.384 Mbit/s
Table 4-6
Data Rate
related port
4 x 2.048 Mbit/s
2 x 4.096 Mbit/s
1 x 8.192 Mbit/s
1 x 16.384 Mbit/s
DSP Accessible Buffer (D-Buffer)
DSP Access to D-Buffer Input Blocks
A000
A000
A000
RXD0
H
H
H
H
I-Buffer Logical Memory Mapping of Output Buffers
I-Buffer Logical Memory Mapping of Input Buffers
in0
- A01F
- A03F
- A07F
- A07F
80
80
80
00
00
00
00
80
H
H
H
H
RXD0
TXD0
H
out0
H
H
H
H
H
H
H
in0
- BF
- FF
- 1F
- 3F
- 7F
- 7F
- 9F
A020
A040
-FF
H
H
H
H
H
H
H
H
RXD1
H
H
in1
4-23
Output Buffer Blocks
Input Buffer Blocks
- A03F
- A07F
20
40
A0
C0
RXD1
TXD1
H
H
out1
H
H
in1
Input Blocks
- 3F
- 7F
- BF
- FF
H
H
H
H
H
H
A040
40
C0
RXD2
TXD2
H
RXD2
out2
H
in2
H
in2
- 5F
- DF
- A05F
Functional Description
H
H
60
E0
H
RXD3
TXD3
H
out3
H
in3
- 7F
A060
- FF
PEB 20571
H
H
RXD3
H
in3
- A07F
DELIC
2003-08
H

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