PEB20571 INFINEON [Infineon Technologies AG], PEB20571 Datasheet - Page 155

• Manufacturer Part Number: PEB20571
• Description: ICs for Communications
• Manufacturer: INFINEON [Infineon Technologies AG]

DELAY(7:0)
Note: Unused bits (x) read as ‘0’.
6.2.1.5
The Initialization Channel Command Register contains the Command bits for VIP_n,
Channel_m together with 5 bits of the VIP channel address.
The VIP only acts upon the command bits if they were declared valid by the DELIC
issuing a write command. Bit WR is dedicated to the command bits of groups CONF1,
CONF2 and TST2, whereas WR_ST informs the VIP about changes in the layer 1 state
machine of the DELIC (SMINI(2:0) and MSYNC bits).
The DELIC may also explicitly read the VIP’s status information by issueing bit RD.
The reset value of each bit is ’0’ except bits MODE(2:0) which are set to ’011’
Note: A read command to the VIP must not be issued during normal operation to avoid
Preliminary Data Sheet
a loss of information when the VIP is reporting status information at the same time.
TRANSIU Initialization Channel Command Register
Line Delay Value (U
Returns the value of the measured line delay (in µs) between the Upn
transmit and receive frame with a resolution of 65 ns or 130 ns
(programmable in VIPCMR.DELRE bits).
The value indicates the delay between the transmitted M-bit and the
received LF-bit (minus the U
direction equals to the measured delay divided by two.
The channel address for the delay measurement is coded in
VIPCMR.DELCH(2:0) bits.
The VIP provides 2 values in one U
which the bigger one is the valid.
Note: The transceiver delays of the VIP are included in the delay
measurement.
PN
)
6-15
PN
guard time of 2 bits). The delay for one
PN
frame (one every 125 µs) from
Register Description
DELIC
2003-08