PEB20571 INFINEON [Infineon Technologies AG], PEB20571 Datasheet - Page 132

• Manufacturer Part Number: PEB20571
• Description: ICs for Communications
• Manufacturer: INFINEON [Infineon Technologies AG]

Preliminary Data Sheet
the DMA stops the transaction before finishing, it has to drive DACK high. The OAK
continues driving DREQR high, stops decrementing RX_CNT and waits until DACK
becomes low.
After a read of RX_CREG bytes by the DMA from the Receive Mailbox, the RX_CNT
becomes ‘0’. Then RX_BSY bit is reset to ’0’, and DREQR is deasserted . Reset of
RX_BSY bit may be programmed to cause an interrupt (INT1) to the OAK.
Note: RX_BSY is not an indication for the transaction partners. It may be used for
Data Transfer via the Receive Mailbox
• The OAK writes RX_CREG bytes to Receive Mailbox.
• The OAK writes to RX_CREG.
• DREQR is asserted (’high’), and RX_BSY bit is set (’1’).
• The DMA asserts DACK and issues RX_CREG read transactions to the Mailbox.
• DREQR is deasserted (’low’), and RX_BSY bit is reset (’0’).
• If RX_MASK bit is reset (’0’): an OAK interrupt (INT2) is activated.
Note: 1. The OAK must not write to the RX_CREG reg before RX_BSY is reset.
4.10.7
The size of the FIFOs is 18 bytes (9 words) for each Tx and Rx. On the OAK side, each
FIFO contains 9 registers (TDT0-8 and RDT0-8) which may be accessed separately. On
the DMA side, only the current top of the FIFO is available.
The transfer is divided to bulks, the size of the current bulk is determined in the
RX_CREG/TX_CREG.
Transmit FIFO
This FIFO is written by the DMA. The first write in a bulk will be to TDT0 least significant
byte, the second to TDT0 most significant byte, etc., until the size of the current bulk was
reached. Then the OAK will read the data from the relevant TDTn registers.
Receive FIFO
This FIFO is written by the OAK. The OAK fills RDT0 to RDTn. The DMA will then read
consecutive bytes from the FIFO, where the first byte will be RDT0 least significant byte,
the 2nd RDT0 most significant byte, etc. until the size of the current bulk was reached.
Note: This Rx FIFO and Tx FIFO functionality is only provided when the Mailbox is in
internal software needs of the OAK .
2. Writing ’0’ to RX_CREG is not allowed.
DMA mode (CFG:DMA = ‘1’). In case of non DMA mode (CFG:DMA = ‘0’), the
FIFOs are used as secondary (extension) to the General Purpose Mailbox, which
means that the General Purpose Mailbox will have 18 words for each direction
(OAK and µP), instead of 9.
Access to the DMA FIFOs
4-48
Functional Description
DELIC
2003-08