PEB20571 INFINEON [Infineon Technologies AG], PEB20571 Datasheet - Page 46

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PEB20571

Manufacturer Part Number
PEB20571
Description
ICs for Communications
Manufacturer
INFINEON [Infineon Technologies AG]
Datasheet

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Table 2-13
Pin
No.
10
12
13
14
15
7
Preliminary Data Sheet
Symbol In (I)
DREQT O
CS
WR/
R/W
RD/
DS
ALE
MODE
Microprocessor Bus Interface Pins (DELIC-PB) (Continued)
Out (O)
I
I
I
I
I
During
Reset
EMUL-
ATION
BOOT
Strap
(internal
pull-down),
refer to
Table 2-19
I
I
I
I
I
After
Reset
L
I
I
I
I
I
2-19
Function
DMA Request for Transmit Direction
Note: May be configured to active high
Chip Select
A "low" on this line selects all registers
for read/write operations.
Write (Intel/Siemens Mode)
Indicates a write access.
Read/Write (Motorola Mode)
Indicates the direction of the data
transfer
Read (Intel/Siemens Mode)
Indicates a read access.
Data Strobe (Motorola Mode)
During a read cycle, DS indicates that
the DELIC should place valid data on
the bus. During a write access, DS
indicates that valid data is on the bus.
Address Latch Enable
Controls the on-chip address latch in
multiplexed bus mode. While ALE is
’high’, the latch is transparent. The
falling
address. ALE is also evaluated to
determine
(’low’=multiplexed,
’high’=demultiplexed)
Bus Mode Selection
Selects the µP bus mode
(’low’=Intel/Infineon, ’high’=Motorola)
or active low (the default is active
high)
edge
the
latches
Pin Descriptions
bus
the
PEB 20571
current
DELIC
2003-08
mode

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