PEB20571 INFINEON [Infineon Technologies AG], PEB20571 Datasheet - Page 81

• Manufacturer Part Number: PEB20571
• Description: ICs for Communications
• Manufacturer: INFINEON [Infineon Technologies AG]

Figure 3-10 DELIC in Multiplexed and in De-multiplexed Bus Mode
Note: In both modes only the 7 LSBs of A-bus or AD/bus are connected to the
3.4.3
The internal interface between the on-chip DSP and µP is established by two Mailboxes:
a ’general’ Mailbox and a dedicated DMA Mailbox. The non-DMA mode provides the
option to combine them together building a double-sized ’general’ Mailbox. The DELIC
is configured to DMA or non-DMA mode by a dedicated bit in the µP interface
configuration register (MCFG:DMA).
DMA Mode
The DMA Mailbox can be accessed only by a DMA controller. The DACK input pin
(together with the RD and WR signals) is used to access the DMA Mailbox. Only the
general Mailbox can be accessed directly by the µP. In DMA mode, the pin DACK/A4 is
Preliminary Data Sheet
Multiplexed Mode
De-multiplexed Mode
Address inputs of the DELIC. In DMA mode DACK/A4 input pin is used as DACK,
and A4 is internally driven to ‘0’. In this case A4 of the µP A/AD-bus is also not
connected to the DELIC.
DMA or Non-DMA Mode
µP
µP
ALE
AD
D
A
8
7
‘1’
3-25
8
7
D
A
ALE
D
A
ALE
DELIC
DELIC
Interface Description
DELIC
2003-08