PEB20571 INFINEON [Infineon Technologies AG], PEB20571 Datasheet - Page 227

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PEB20571

Manufacturer Part Number
PEB20571
Description
ICs for Communications
Manufacturer
INFINEON [Infineon Technologies AG]
Datasheet

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Table 9-10
Mode
Normal (Non-Fly-By)
Fly-By
In Fly-By mode R and W are used inverted to the normal mode, because these signals
are required also for concurrent accesses of an external memory device.
Table 9-11
Parameter
DACK setup time to W or R falling
edge
DACK hold time after W or R rising
edge
D-bus setup time to W rising edge
D-bus hold time after W rising edge
DREQT/DREQR delay after W or R
falling edge
W pulse width and interval between W
pulses
R pulse width and interval between R
pulses
D-bus valid after R falling edge
D-bus float (high impedance) after R
rising edge
Preliminary Data Sheet
R/W Behavior During DMA Transactions in Normal and Fly-By Mode
DMA Transaction Timing in Intel/Infineon Mode
R = ‘1’, W = ‘0’
Write DMA transaction.
(A response to DMA
transmitter request)
Read DMA transaction.
(A response to DMA
receiver request)
Symbol
t
t
t
t
t
t
t
t
t
t
t
SAW
HWA
HRA
SDW
HWD
DWR
DRR
WW
WR
DRDV
DRDT
9-13
t
SAR
min.
7
5
5
10
0
30
30
0
0
Limit Values Unit
R = ‘0’, W = ‘1’
Read DMA transaction.
(A response to DMA receiver
request)
Write DMA transaction.
(A response to DMA transmitter
request)
max.
36
22
15
ns
ns
ns
ns
ns
ns
ns
Timing Diagrams
Test
Conditions
Output load
capacity of
50 pF
DELIC
2003-08

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