HD6412240 RENESAS [Renesas Technology Corp], HD6412240 Datasheet - Page 158

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HD6412240

Manufacturer Part Number
HD6412240
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family / H8S/2200 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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Section 5 Interrupt Controller
5.4
5.4.1
Interrupt operations in the H8S/2245 Group differ depending on the interrupt control mode.
NMI interrupts are accepted at all times except in the reset state and the hardware standby state. In
the case of IRQ interrupts and on-chip supporting module interrupts, an enable bit is provided for
each interrupt. Clearing an enable bit to 0 disables the corresponding interrupt request. Interrupt
sources for which the enable bits are set to 1 are controlled by the interrupt controller.
Table 5.5 shows the interrupt control modes.
The interrupt controller performs interrupt control according to the interrupt control mode set by
the INTM1 and INTM0 bits in SYSCR, the priorities set in ICR, and the masking state indicated
by the I and UI bits in the CPU's CCR.
Table 5.5
Rev.3.00 Mar. 26, 2007 Page 116 of 772
REJ09B0355-0300
Interrupt
Control Mode INTM1 INTM0
0
1
Interrupt Operation
Interrupt Control Modes and Interrupt Operation
Interrupt Control Modes
0
SYSCR
0
1
Priority
Setting Registers
ICR
ICR
Interrupt
Mask Bits Description
I
I, UI
Interrupt mask control is
performed by the I bit.
Priority can be set with ICR.
3-level interrupt mask control
is performed by the I and UI
bits.
Priority can be set with ICR.

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