HD6412240 RENESAS [Renesas Technology Corp], HD6412240 Datasheet - Page 463

• Manufacturer Part Number: HD6412240
• Description: Renesas 16-Bit Single-Chip Microcomputer H8S Family / H8S/2200 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Bit 0—Multiprocessor Bit Transfer (MPBT): When transmission is performed using
multiprocessor format in asynchronous mode, MPBT stores the multiprocessor bit to be added to
the transmit data.
The MPBT bit setting is invalid in clocked synchronous mode, when multiprocessor format is not
used, and when the operation is not transmission.
12.2.8
BRR is an 8-bit register that sets the serial transfer bit rate in accordance with the baud rate
generator operating clock selected by bits CKS1 and CKS0 in SMR.
BRR can be read or written to by the CPU at all times.
BRR is initialized to H'FF by a reset, and in standby mode or module stop mode.
As baud rate generator control is performed independently for each channel, different values can
be set for each channel.
Table 12.3 shows sample BRR settings in asynchronous mode, and table 12.4 shows sample BRR
settings in clocked synchronous mode.
Bit 0
MPBT
0
1
Bit
Initial value
R/W
Bit Rate Register (BRR)
Description
Data with a 0 multiprocessor bit is transmitted
Data with a 1 multiprocessor bit is transmitted
:
:
:
R/W
7
1
R/W
6
1
R/W
5
1
Section 12 Serial Communication Interface (SCI)
R/W
4
1
Rev.3.00 Mar. 26, 2007 Page 421 of 772
R/W
3
1
R/W
2
1
REJ09B0355-0300
R/W
1
1
(Initial value)
R/W
0
1